T8207 Datasheet, PDF (96/158 Pages) Agere Systems – ATM Interconnect

CelXpres T8207
ATM Interconnect
Advance Data Sheet
September 2001
14 Registers (continued)
Table 56. TX UTOPIA Clock Configuration (TXUCCF) (010Ch)
Name
tx_utopia_clk_div
tx_utopia_clk_src_sel
Reserved
tx_utopia_clk_en
Reserved
Bit Pos. Type Reset
Description
7:0 RW 01h TX UTOPIA Clock Division. The selected TX UTOPIA clock
source is divided by the number programmed in these bits as
follows:
“00000000” = reserved
“00000001” = no division
“00000010” = divide by 2
“00000011” = divide by 3
.
.
.
“11111111” = divide by 255
These bits are meaningful only when the T8207 generates the
TX UTOPIA clock.
9:8 RW 0 TX UTOPIA Clock Source Select. The source of the TX
UTOPIA clock is selected via these bits as follows:
“00” = cell bus write clock
“01” = reserved
“10” = pclk
“11” = mclk
10 RW
11 RW
15:12 RO
These bits are meaningful only when the T8207 generates the
TX UTOPIA clock.
0 Reserved. Program to ‘0.’
0 TX UTOPIA Clock Enable. If this bit is ‘1,’ the T8207 gener-
ates the TX UTOPIA clock on the u_txclk pin. If this bit is ‘0,’
the u_txclk pin is configured as an input.
0 Reserved.
96
Agere Systems Inc.