T8207 Datasheet, PDF (139/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
14 Registers (continued)
Table 123. PHY Port X Multicast Memory (PPXMM) (0C20h to 0DE0h)
Name
Offset Type Reset
Description
multicast_receive_enable[15:0]
00h RW
multicast_receive_enable[31:16] 02h
multicast_receive_enable[47:32] 04h
.
.
.
.
.
.
multicast_receive_enable[239:224] 1Ch
multicast_receive_enable[255:240] 1Eh
X This memory space contains 256 active-high enable
bits. Each bit represents a multicast net number from
0 through 255. If a bit is set, the corresponding multi-
cast net number data cell is sent to the queue group
for PHY port X. The least significant bit is multicast
net number 0.
The letter X in the data structure and in the bit names represents the values of 1 through 15 for 15 of the 16 PHY
ports. The base addresses of the 15 multicast memory locations are shown below.
Memory Name
Base Address
PHY Port 1 Multicast Memory
0C20h
PHY Port 2 Multicast Memory
0C40h
PHY Port 3 Multicast Memory
0C60h
PHY Port 4 Multicast Memory
0C80h
PHY Port 5 Multicast Memory
0CA0h
PHY Port 6 Multicast Memory
0CC0h
PHY Port 7 Multicast Memory
0CE0h
PHY Port 8 Multicast Memory
0D00h
PHY Port 9 Multicast Memory
0D20h
PHY Port 10 Multicast Memory
0D40h
PHY Port 11 Multicast Memory
0D60h
PHY Port 12 Multicast Memory
0D80h
PHY Port 13 Multicast Memory
0DA0h
PHY Port 14 Multicast Memory
0DC0h
PHY Port 15 Multicast Memory
0DE0h
Note: When the T8207_sel bit = ‘0’ multicast memory at address 0D00h—0DECh are ignored.
Agere Systems Inc.
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