T8207 Datasheet, PDF (153/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
19 Timing Requirements (continued)
19.3 External LUT Memory Timing
CelXpres T8207
ATM Interconnect
t4
t1
t2
t3
TR_A[17:0] & TR_CS*[1:0]
TR_WE*
TR_OE*
TR_D[7:0]
Note: 30 pF load on outputs.
Figure 27. External LUT Memory Read Timing (cyc_per_acc = 2 and cyc_per_acc = 3)
5-7795bF
t6
t2
t4
t5
TR_A[17:0] & TR_CS*[1:0]
t3
TR_WE*
TR_OE*
TR_D[7:0]
t1
t7
Note: 30 pF load on outputs.
Figure 28. External LUT Memory Write Timing (cyc_per_acc = 2 and cyc_per_acc = 3)
5-7796aF
Agere Systems Inc.
153