Z8FMC16100 Datasheet, PDF (61/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
39
Table 13. Port Alternate Function Mapping (Continued)
Port Pin
Port B PB2
PB1
Mnemonic
PB2
PB2INT
ANA2
T0IN2
PB1
PB1INT
ANA1
PB0 PB0
PB0INT
ANA0
Port C PC0 PC0
T0OUT
AF0 AF1 Alternate Function Description
0 0 GPIO/Timer 0 input 2.
0 1 GPIO/Timer 0 input 2—edge interrupt enabled.
1 0 ADC analog input 2.
1 1 Timer 0 input 2; dedicated input.
0 0 GPIO/Timer 0 input 1.
0 1 GPIO/Timer 0 input 1—edge interrupt enabled.
1 0 ADC analog input 1.
1 1 Reserved; do not use.
0 0 GPIO/Timer 0 input 0.
0 1 GPIO/Timer 0 input 0—edge interrupt enabled.
1 0 ADC analog input 0.
1 1 Reserved; do not use.
0 0 GPIO.
0 1 Reserved; do not use.
1 0 Timer 0 output.
1 1 Reserved; do not use.
GPIO Interrupts
Many of the GPIO port pins can be used as interrupt sources. The Port A[7:0] pins can be
configured to generate an interrupt request on either the rising edge or falling edge of the
pin input signal. The Port B[3:0] pins can be configured to generate an interrupt request on
both the rising and falling edges of the pin input signal. For Port A, the GPIO interrupt
edge selection is controlled by the Interrupt Edge Select subregister. Enabling and dis-
abling of the Port Interrupts is handled in the Interrupt Controller. Port B[3:0], with dual
edge interrupt capability, is selected by AF1, AF0. Refer to the Interrupt Controller chap-
ter on page 51 for more information.
GPIO Control Register Definitions
Four registers for each Port provide access to GPIO control, input data, and output data.
Table 14 lists these Port registers. Use the Port A–C Address and Control registers
together to provide access to subregisters for Port configuration and control.
PS024604-1005
PRELIMINARY
GPIO Interrupts