Z8FMC16100 Datasheet, PDF (196/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8 Encore!^® Motor Control Flash MCUs
Product Specification
174
16. The I²C slave sends an Acknowledge by pulling the SDA signal Low during the next
high period of SCL. The I²C controller sets the ACK bit in the I²C Status Register.
If the slave does not acknowledge, refer to the second paragraph of Step 11.
17. The I²C controller shifts the data out by the SDA signal. After the first bit is sent, the
transmit interrupt asserts.
18. If more bytes remain to be sent, return to Step 14.
19. The software responds by asserting the STOP bit of the I²C Control Register.
20. The I²C controller completes transmission of the data on the SDA signal.
21. The I²C controller sends a STOP condition to the I²C bus.
Note:
If the slave responds with a Not Acknowledge during the transfer, the I²C controller
asserts the NCKI bit, sets the ACKV bit, clears the ACK bit in the I²C State Register, and
halts. The software terminates the transaction by setting either the STOP bit (end transac-
tion) or the START bit (end this transaction, start a new one). The Transmit Data Register
is flushed automatically.
Master Read Transaction with a 7-Bit Address
Figure 30 illustrates the data transfer format for a read operation to a 7-bit addressed slave.
S
Slave Address
R=1 A
Data
A
Data
A P/S
Figure 30. Data Transfer Format—Master Read Transaction with a 7-Bit Address
The procedure for a master Read operation to a 7-bit addressed slave is as follows:
1. The software initializes the MODE field in the I²C Mode Register for MASTER/
SLAVE mode with 7- or 10-bit addressing (the I²C bus protocol allows the mixing of
slave address types). The MODE field selects the address width for this mode when
addressed as a slave (but not for the remote slave). The software asserts the IEN bit in
the I²C Control Register.
2. The software writes the I²C Data Register with a 7-bit slave address, plus the Read bit
(which is set to 1).
3. The software asserts the START bit of the I²C Control Register.
4. If this operation is a single-byte transfer, the software asserts the NAK bit of the I²C
Control Register so that after the first byte of data has been read by the I²C controller,
a Not Acknowledge instruction is sent to the I²C slave.
5. The I²C controller sends a START condition.
6. The I²C controller sends the address and Read bit out via the SDA signal.
I2C Master/Slave Controller
PRELIMINARY
PS024604-1005