Z8FMC16100 Datasheet, PDF (309/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
287
Table 165. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
Address
Mode
Symbolic Operation dst src
ADD dst, src dst ← dst + src
rr
r Ir
RR
R IR
R IM
IR IM
ADDX dst, src dst ← dst + src
ER ER
ER IM
AND dst, src dst ← dst + src
rr
r Ir
RR
R IR
R IM
IR IM
ANDX dst, src dst ← dst AND src ER ER
ER IM
ATM
Atomic execution
BCLR bit, dst dst[bit] ← 0
r
BIT p, bit, dst dst[bit] ← p
r
BRK
Debugger Break
BSET bit, dst dst[bit] ← 1
r
BSWAP dst
dst[7:0] ← dst[0:7]
R
BTJ p, bit, src, if src[bit] = p
r
dst
PC ← PC + X
Ir
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = unaffected.
X = undefined.
0 = reset to 0.
1 = set to 1.
Op
Code(s)
(Hex)
02
03
04
05
06
07
08
09
52
53
54
55
56
57
58
59
2F
E2
E2
00
E2
D5
F6
F7
Flags
Fetch Instr.
C Z S V D H Cycles Cycles
****0* 2
3
2
4
3
3
3
4
3
3
3
4
****0* 4
3
4
3
— * * 0 —— 2
3
2
4
3
3
3
4
3
3
3
4
— * * 0 —— 4
3
4
3
—————— 1
1
— * * 0 —— 2
2
— * * 0 —— 2
2
—————— 1
1
— * * 0 —— 2
2
X* *0- - 2
2
—————— 3
3
3
4
PS024604-1005
PRELIMINARY
eZ8 CPU Instruction Set