Z8FMC16100 Datasheet, PDF (52/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8 Encore!^® Motor Control Flash MCUs
Product Specification
30
BITS
FIELD
RESET
R/W
ADDR
Table 9. Reset Status and Control Register (RSTSCR)
7
POR
R
6
5
4
3
STOP
WDT
EXT
FLT
See Table 10 below
R
R
R
R
FF0H
2
1
Reserved
R
0
FLTSEL
0
R/W
The FLTSEL bit in this register allows software selection of the RESET pin. The pin func-
tion is selected by writing the unlock sequence followed by the mode to this register. A
software write to the FLTSEL bit will override the value set by the FLTSEL user option bit.
0 = RESET/Fault0 pin is configured as RESET input.
1= RESET/Fault0 pin is configured as Fault0 input.
Table 10. Reset Status Register Values Following Reset
Reset or Stop-Mode Recovery Event
POR STOP WDT EXT FLT
Power-On Reset
1
0
0
0
0
Reset using RESET pin assertion
0
0
0
1
0
Reset using Watch-Dog Timer time-out
0
0
1
1
0
Reset by OCD writing OCDCTL[0] to 1
1
0
0
1
0
Reset from Fault Detect Logic
0
0
0
1
1
Stop-Mode Recovery using GPIO pin transition
0
1
0
0
0
Stop-Mode Recovery using Watch-Dog Timer time-out
0
1
1
0
0
Note: Additional bits may be set depending on the number of resets simultaneously occurring.
Reset and Stop-Mode Recovery
PRELIMINARY
PS024604-1005