Z8FMC16100 Datasheet, PDF (46/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8 Encore!^® Motor Control Flash MCUs
Product Specification
24
System Reset
During a system reset, the Z8FMC16100 Series Flash MCU is held in RESET for 66
cycles of the Internal Precision Oscillator. At the beginning of RESET, all GPIO pins are
configured as inputs. All GPIO programmable pull-ups are disabled.
At the start of a System Reset, the motor control PWM outputs are forced to high-imped-
ance momentarily. When the Option Bits that control the off-state have been properly
evaluated the PWM outputs are forced to the programmed off-state.
During RESET, the eZ8 CPU and on-chip peripherals are idle; however, the Internal Preci-
sion Oscillator and Watch-Dog Timer oscillator continue to run. During the first 50 clock
cycles the internal option bit registers are initialized, after which the system clock for the
core and peripherals begins operating. The eZ8 CPU and on-chip peripherals remain idle
through the next 16 cycles of the system clock after which time the internal reset signal is
deasserted.
Upon RESET, control registers within the Register File that have a defined reset value are
loaded with their reset values. Other control registers (including the Flags) and general-
purpose RAM are undefined following RESET. The eZ8 CPU fetches the RESET vector
at Program Memory addresses 0002h and 0003h and loads that value into the Program
Counter. Program execution begins at the RESET vector address.
Table 7 lists the system reset sources as a function of the operating mode. The text follow-
ing provides more detailed information on the individual RESET sources. Please note that
a Power-On Reset/Voltage Brown-Out event always has priority over all other possible
reset sources to ensure a full system reset occurs.
Table 7. System Reset Sources and Resulting Reset Action
Operating Mode System Reset Source
Normal or HALT Power-On Reset/Voltage Brown-Out
modes
Watch-Dog Timer time-out when
configured for reset.
RESET pin assertion.
Write OCDCTL[0] to 1.
STOP mode
Fault detect logic reset.
Power-On Reset/Voltage Brown-Out.
RESET pin assertion.
Fault detect logic reset.
Action
System Reset.
System Reset.
System Reset.
System Reset except the On-Chip
Debugger is not reset.
System Reset.
System Reset.
System Reset.
System Reset.
Reset and Stop-Mode Recovery
PRELIMINARY
PS024604-1005