Z8FMC16100 Datasheet, PDF (143/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
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• The Break Detect interrupt (BRKD bit in Status0 register) indicates when a Break is de-
tected by the slave (break condition for at least 11 bit times). Software can use this in-
terrupt to start a timer checking for message frame time-out. The duration of the break
can be read in the RxBreakLength[3:0] field of the Mode Status Register.
• The Break Detect interrupt (BRKD bit in Status0 register) indicates when a Wake-up
message has been received if the LIN-UART is in LinSleep state.
• In LIN slave mode, if the BRG counter overflows while measuring the autobaud period
(Start bit to beginning of bit 7 of autobaud character) an Overrun Error is indicated (OE
bit in the Status0 register). In this case, software sets the LinState field back to 10b,
where the Slave ignores the current message and waits for the next Break. The Baud
Reload High and Low registers are not updated by hardware if this autobaud error oc-
curs. The OE bit is also set if a data overrun error occurs.
LIN System Clock Requirements
The LIN master provides the timing reference for the LIN network and is required to have
a clock source with a tolerance of ±0.5%. A slave with autobaud capability is required to
have a baud clock matching the master oscillator within ±14%. The slave nodes autobaud
to lock onto the master timing reference with an accuracy of ±2%. If a Slave does not con-
tain autobaud capability it must include a baud clock which deviates from the masters by
no more than ±1.5%. These accuracy requirements must include affects such as voltage
and temperature drift during operation.
Before sending/receiving messages, the Baud Reload High/Low registers must be initial-
ized. Unlike standard UART modes, the Baud Reload High/Low registers must be loaded
with the baud interval rather than 1/16 of the baud interval.
In order to autobaud with the required accuracy, the LIN slave system clock must be at
least 100 times the baud rate.
LIN Mode Initialization and Operation
The LIN protocol mode is selected by setting either the LMST (LIN Master) or LSLV (LIN
Slave), and optionally (for LIN slave) the ABEN (Autobaud Enable) bits in the LIN Control
Register. To access the LIN Control Register, the MSEL (Mode Select) field of the LIN-
UART Mode Select/Status register must be = 010B. The LIN-UART Control0 register
must be initialized with TEN = 1, REN = 1, all other bits = 0.
In addition to the LMST, LSLV and ABEN bits in the LIN Control Register, a Lin-
State[1:0] field exists that defines the current state of the LIN logic. This field is initially
set by software. In the LIN Slave mode, the LinState field is updated by hardware as the
Slave moves through the Wait For Break, AutoBaud, and Active states.
The Noise Filter may also need to be enabled and configured when interfacing to a LIN
bus.
PS024604-1005
PRELIMINARY
LIN Protocol Mode