Z8FMC16100 Datasheet, PDF (265/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
243
Debug Mode
The operating characteristics of the Z8FMC16100 Series Flash MCU device in DEBUG
mode are:
• The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to ex-
ecute specific instructions
• The system clock operates unless in STOP mode
• All enabled on-chip peripherals operate unless in STOP mode or otherwise defined by
the on-chip peripheral to disable in DEBUG mode
• Automatically exits HALT mode
• Constantly refreshes the Watch-Dog Timer, if enabled
Entering Debug Mode
The device enters DEBUG mode following any of the following operations:
• Writing the DBGMODE bit in the OCD Control Register to 1 using the OCD interface
• eZ8 CPU execution of a BRK (break point) instruction (when enabled)
• Match of PC to OCDCNTR register (when enabled)
• OCDCNTR register decrements to 0000h (when enabled)
• The DBG pin is Low when the device exits Reset
Exiting Debug Mode
The device exits DEBUG mode following any of the following operations:
• Clearing the DBGMODE bit in the OCD Control Register to 0
• Power-on reset
• Voltage Brown Out reset
• Asserting the RESET pin Low to initiate a Reset
• Driving the DBG pin Low while the device is in STOP mode initiates a System Reset
OCD Data Format
The On-Chip Debugger (OCD) interface uses the asynchronous data format defined for
RS-232. Each character is transmitted as 1 start bit, 8 data bits (least-significant bit first),
and 1 stop bit. See Figure 44.
PS024604-1005
PRELIMINARY
Debug Mode