Z8FMC16100 Datasheet, PDF (105/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
83
Bit
Position
[7:6]
Reserved
[5]
DBGMSK
Value
(H)
0
1
Description
Must be 0.
Debug Entry Fault Mask
Entering CPU DEBUG Mode generates a PWM fault.
Entering CPU DEBUG mode does not generate a PWM fault.
[4:3]
Reserved
Must be 0.
[2]
F1MASK 0
Fault 1 Fault Mask
Fault 1 generates a PWM fault.
1
Fault 1 does not generate a PWM fault.
[1]
C0MASK 0
Comparator Fault Mask
Comparator generates a PWM fault.
1
Comparator does not generate a PWM fault.
[0]
F0MASK 0
Fault Pin Mask
Fault0 pin generates a PWM fault.
1
Fault0 pin does not generate a PWM fault.
Note: This register can only be written when PWEN is cleared.
PWM Fault Status Register
The PWM Fault Status (PWMFSTA) Register, shown in Table 53, provides status of fault
inputs and timer reload.. The fault flags indicate which fault source is active. If a fault
source is masked the flag in this register will not be set if the source is asserted. The
reload flag is set when the timer compare vaules are updated. Clear flags by writing a 1 to
the flag bits. Fault flag bits can only be cleared if the associated fault source has deas-
serted.
PS024604-1005
PRELIMINARY
PWM Fault Status Register