Z8FMC16100 Datasheet, PDF (342/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8 Encore!^® Motor Control Flash MCUs
Product Specification
320
Hex Address: F25
PWM Fault Status Register (PWMFSTAT)
BITS
FIELD
RESET
R/W
ADDR
7
6
5
RLDFlag Reserved DBGFLAG
U
0
U
R/W1C
R
R/W1C
4
3
Reserved
00
R
F25H
2
1
F1FLAG C0FLAG
U
U
R/W1C R/W1C
0
FFLAG
U
R/W1C
Bit
Position
Value
(H)
Description
[7]
RLDFlag
Reload Flag
This bit is set and latched when a PWM timer reload occurs. Writing a 1 to this bit
clears the flag.
[6]
0
Reserved
Reserved
Always reads 0.
[5]
DBGFLAG
Debug Flag
This bit is set and latched when DEBUG mode is entered. Writing a 1 to this bit
clears the flag.
[4:3]
0
Reserved
Reserved
Always reads 0.
[2]
F1FLAG
Fault1 Flag
This bit is set and latched when Fault1 is asserted. Writing a 1 to this bit clears
the flag.
[1]
C0FLAG
Comparator 0 Flag
This bit is set and latched when Comparator is asserted. Writing a 1 to this bit
clears the flag.
[0]
FFLAG
Fault Flag
This bit is set and latched when the FAULT0 input is asserted. Writing a 1 to this
bit clears the flag.
Note: For this register, W1C means you must write one to clear the flag.
PS024604-1005
PRELIMINARY
Appendix A—Register Tables