Z8FMC16100 Datasheet, PDF (187/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
165
I²C Master/Slave Controller Registers
Table 91 summarizes the I²C master/slave controller’s software-accessible registers.
Table 91. I²C Master/Slave Controller Registers
Name
Abbreviation
I²C Data
I2CDATA
I²C Interrupt Status I2CISTAT
I²C Control
I2CCTL
I²C Baud Rate High I2CBRH
I²C Baud Rate Low I2CBRL
I²C State
I²C Mode
I2CSTATE
I2CMODE
I²C Slave Address I2CSLVAD
Description
Transmit/receive data register.
Interrupt status register.
Control register—basic control functions.
High byte of baud rate generator initialization
value.
Low byte of baud rate generator initialization
value.
State register.
Selects MASTER or SLAVE modes, 7- or 10-bit
addressing; configure address recognition, define
slave address bits [9:8].
Defines slave address bits [7:0].
Comparison with the Master Mode Only I²C Controller
Porting code written for the MASTER ONLY I²C controller found on other Z8 Encore!^®
parts to the I²C Master/Slave Controller is straightforward. The I2CDATA, I2CCTL,
I2CBRH and I2CBRL Register definitions have not changed. The following bullets high-
light the differences between these two designs.
• The Status (I2CSTATE) Register from the MASTER ONLY I²C controller is split into
the Interrupt Status (I2CISTAT) Register and the State (I2CSTATE) Register because
more interrupt sources are available. The ACK, 10B, TAS (now called AS), and DSS
(now called DS) bits, formerly part of the Status Register, are now part of the State Reg-
ister.
• The I2CSTATE Register was called the Diagnostic State (I2CDST) Register in the
MASTER-mode-only version. The I2CDST Register provided diagnostic information.
The I2CSTATE Register contains status and state information that may be useful to
software in an operational mode.
• The I2CMODE Register was called the Diagnostic Control (I2CDIAG) Register in the
MASTER-mode-only version. The I2CMODE Register provides control for the
SLAVE modes of operation, as well as the most significant two bits of the 10-bit slave
address.
PS024604-1005
PRELIMINARY
I2C Master/Slave Controller Registers