Z8FMC16100 Datasheet, PDF (184/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8 Encore!^® Motor Control Flash MCUs
Product Specification
162
SPISTATE - SPI State Machine
Defines the current state of the internal SPI State Machine.
SPI Baud Rate High and Low Byte Registers
The SPI Baud Rate High and Low Byte registers combine to form a 16-bit reload value,
BRG[15:0], for the SPI Baud Rate Generator. The SPI baud rate is calculated using the
following equation:
System Clock Frequency (Hz)
SPI Baud Rate (bits/s) =
2 x BRG[15:0]
Minimum baud rate is obtained by setting BRG[15:0] to 0000h for a clock divisor value
of (2 X 65536 = 131072).
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Table 89. SPI Baud Rate High Byte Register (SPIBRH)
7
6
5
4
3
2
1
0
BRH
FFH
R/W
F66H
BRH = SPI Baud Rate High Byte
Most significant byte, BRG[15:8], of the SPI Baud Rate Generator’s reload value.
Table 90. SPI Baud Rate Low Byte Register (SPIBRL)
7
6
5
4
3
2
1
0
BRL
FFH
R/W
F67H
BRL = SPI Baud Rate Low Byte
Least significant byte, BRG[7:0], of the SPI Baud Rate Generator’s reload value.
Serial Peripheral Interface
PRELIMINARY
PS024604-1005