Z8FMC16100 Datasheet, PDF (161/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
139
BITS
FIELD
RESET
R/W
ADDR
Table 74. LIN Control Register (U0CTL1 with MSEL = 010b)
7
LMST
6
LSLV
5
ABEN
4
ABIEN
3
2
LinState[1:0]
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
F43H with MSEL = 010b
1
0
TxBreakLength
0
0
R/W
R/W
LMST—LIN Master Mode
0 = LIN Master Mode not selected
1 = LIN Master Mode selected (if MPEN, PEN, LSLV = 0)
LSLV—LIN Slave Mode
0 = LIN Slave Mode not selected
1 = LIN Slave Mode selected (if MPEN, PEN, LMST = 0)
ABEN—Autobaud Enable
0 = Autobaud not enabled
1 = Autobaud enabled if in LIN Slave mode.
ABIEN—Autobaud Interrupt Enable
0 = Interrupt following Autobaud does not occur
1 = Interrupt WILL follow Autobaud if in LIN Slave mode and ABEN = 1. When the Auto-
baud character is received, a receive interrupt is generated and the ATB bit is set in the
Status0 register. There is no receive data associated with this interrupt. The Baud Reload
registers will be updated by hardware with the new bit period value.
LinState[1:0]—LIN State Machine
The LinState is controlled by both hardware and software. Software can force a state
change at any time if necessary. In normal operation, software moves the state in and out
of Sleep state. For a LIN Slave, software changes the state from Sleep to Wait for Break
after which hardware cycles through the Wait for Break, Autobaud and Active states. Soft-
ware changes the state from one of the active states to Sleep state if the LIN bus goes into
Sleep mode. For a LIN Master, software changes the state from Sleep to Active where it
remains until software sets it back to the Sleep state. After configuration software does not
alter the LinState field during operation.
00 = Sleep State (either LMST or LSLV may be set)
01 = Wait for Break state (only valid for LSLV = 1)
10 = Autobaud state (only valid for LSLV = 1)
11 = Active state (either LMST or LSLV may be set)
TxBreakLength —Used in LIN mode by the master to control the duration of the transmit-
ted Break.
PS024604-1005
PRELIMINARY
LIN-UART Control 1 Registers