Z8FMC16100 Datasheet, PDF (227/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
205
Table 106. ADC Data High Byte Register (ADCD_H)
BITS
7
6
5
4
3
2
1
0
FIELD
ADCDH
RESET
X
R/W
R
ADDR
F72H
Bit
Position
[7:0]
Value
(H)
Description
00H–FFH ADC High Byte
The last conversion output is held in the data registers until the next ADC
conversion has completed.
ADC Data Low Bits Register
The ADC Data Low Bits Register, shown in Table 107, contain the lower bits of the ADC
output as well as an overflow status bit. Access to the ADC Data Low Bits Register is Read-
Only. Reading the ADC Data High Byte Register latches data in the ADC Low Bits Register.
Table 107. ADC Data Low Bits Register (ADCD_L)
BITS
7
6
5
4
3
2
1
0
FIELD
ADCDL
Reserved
RESET
X
X
R/W
R
R
ADDR
F73H
Bit
Position
[7:6]
[5:0]
Reserved
Value
(H)
00–11b
0
Description
ADC Low Bits
These bits are the 2 least significant bits of the 10-bit ADC output. These bits are
undefined after a Reset. The low bits are latched into this register whenever the
ADC Data High Byte register is read.
Reserved—Must Be 0.
PS024604-1005
PRELIMINARY
ADC Data Low Bits Register