Z8FMC16100 Datasheet, PDF (25/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
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CPU and Peripheral Overview
The eZ8 CPU, ZiLOG’s latest 8-bit central processing unit, meets the continuing demand
for faster and more code-efficient microcontrollers. The eZ8 CPU executes a superset of
the original Z8^® instruction set. The eZ8 CPU features include:
• Direct register-to-register architecture allows each register to function as an accumula-
tor, improving execution time and decreasing the required program memory
• Software stack allows much greater depth in subroutine calls and interrupts than hard-
ware stacks
• Compatible with existing Z8^® assembly code
• New instructions improve execution efficiency for code developed using higher-level
programming languages, including C
• Pipelined instruction fetch and execution
• New instructions for improved performance including BIT, BSWAP, BTJ, CPC, LDC,
LDCI, LEA, MULT, and SRL
• New instructions support 12-bit linear addressing of the Register File
• Up to 10 MIPS operation
• C-Compiler friendly
• 2-9 clock cycles per instruction
• For more information regarding the eZ8 CPU, refer to the eZ8 CPU User Manual
(UM0128), available for download at www.zilog.com.
Pulse-Width Modulator for Motor Control Applications
To rotate a 3-phase motor three voltage and current signals must be supplied, each 120°
shifted from each other. To control a 3-phase motor the MCU must provide 6 PWM out-
puts.
The Z8FMC16100 Series Flash MCU features a flexible PWM module with three comple-
mentary pairs or six independent PWM outputs supporting deadband operation and fault
protection trip input. These features provide multiphase control capability for a variety of
motor types and ensure safe operation of the motor by providing immediate shutdown of
the PWM pins during fault condition.
10-Bit Analog-to-Digital Converter
The Z8FMC16100 Series Flash MCU devices feature up to eight channels of 10-bit A/D
conversion.
PS024604-1005
PRELIMINARY
CPU and Peripheral Overview