Z8FMC16100 Datasheet, PDF (319/402 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Flash MCUs

Z8FMC16100 Series Flash MCU
Product Specification
297
Op Code Maps
Figure 57 and Table 166 provide descriptions of the Op Code map data and the abbrevia-
tions. Figures 58 and 59 provide information about each of the eZ8 CPU instructions.
Op Code
Lower Nibble
Fetch Cycles
Instruction Cycles
4
Op Code
Upper Nibble
A
3.3
CP
R2,R1
First Operand
After Assembly
Second Operand
After Assembly
Figure 57. Op Code Map Cell Description
Abbreviation
b
cc
X
DA
ER
IM
Ir
IR
Irr
Table 166. Op Code Map Abbreviations
Description
Abbreviation
Bit position
IRR
Condition code
p
8-bit signed index or
r
displacement
Destination address
R
Extended Addressing register r1, R1, Ir1, Irr1, IR1,
rr1, RR1, IRR1, ER1
Immediate data value
r2, R2, Ir2, Irr2, IR2,
rr2, RR2, IRR2, ER2
Indirect Working Register
RA
Indirect register
rr
Indirect Working Register Pair RR
Description
Indirect Register Pair
Polarity (0 or 1)
4-bit Working Register
8-bit register
Destination address
Source address
Relative
Working Register Pair
Register Pair
PS024604-1005
PRELIMINARY
Op Code Maps