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4524_M Datasheet, PDF (78/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES
4524 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
• Key-on wakeup control register K0 .................................................................0......0......0.......0..
• Key-on wakeup control register K1 .................................................................0......0......0.......0..
• Key-on wakeup control register K2 .................................................................0......0......0.......0..
• Pull-up control register PU0 ............................................................................0......0......0.......0..
• Pull-up control register PU1 ............................................................................0......0......0.......0..
• Port output structure control register FR0 ......................................................0......0......0.......0..
• Port output structure control register FR1 ......................................................0......0......0.......0..
• Port output structure control register FR2 ......................................................0......0......0.......0..
• Port output structure control register FR3 ......................................................0......0......0.......0..
• Carry flag (CY) ....................................................................................................................0..
• Register A .......................................................................................................0.......0......0.......0..
• Register B .......................................................................................................0.......0......0.......0..
• Register D ..............................................................................................................✕......✕.......✕..
• Register E ..............................................................................✕......✕.......✕......✕......✕.......✕......✕.......✕..
• Register X .......................................................................................................0.......0......0.......0..
• Register Y .......................................................................................................0.......0......0.......0..
• Register Z ....................................................................................................................✕.......✕..
• Stack pointer (SP) .................................................................................................1......1.......1..
• Operation source clock .......................................................... On-chip oscillator (operating)
• Ceramic resonator circuit ..................................................................................... Operating
• RC oscillation circuit ...................................................................................................... Stop
• Quarts-crystal oscillator ........................................................................................ Operating
Fig. 51 Internal state at reset
“✕” represents undefined.
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
1-65