4524_M Datasheet, PDF (172/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.1 I/O pins
(7) Pull-up control register PU0
Table 2.1.7 shows the pull-up control register PU0.
Set the contents of this register through register A with the TPU0A instruction.
The contents of register PU0 is transferred to register A with the TAPU0 instruction.
Table 2.1.7 Pull-up control register PU0
Pull-up control register PU0
at reset : 00002 at power down : state retained
Port P03
PU03
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P02
PU02
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P01
PU01
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P00
PU00
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
(8) Pull-up control register PU1
Table 2.1.8 shows the pull-up control register PU1.
Set the contents of this register through register A with the TPU1A instruction.
The contents of register PU1 is transferred to register A with the TAPU1 instruction.
Table 2.1.8 Pull-up control register PU1
Pull-up control register PU1
at reset : 00002 at power down : state retained
Port P13
PU13
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P12
PU12
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P11
PU11
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P10
PU10
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
Rev.2.00 Aug, 06 2004
2-8
REJ09B0107-0200Z