4524_M Datasheet, PDF (224/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.5 Serial I/O
Master
SOUT
SIN
SST instruction
M7’
S7’
M0
M1
M2
M3
M4
M5
M6
M7
S0
S1
S2
S3
S4
S5
S6 S7
SCK
Slave
SST instruction
Control signal
SOUT
SIN
S7’
M7’
S0
S1
S2
S3
S4
S5
S6
S7
M0
M1
M2
M3
M4
M5
M6 M7
M0–M7: Contents of master serial I/O register
S0–S7: Contents of slave serial I/O register
Rising of SCK: Serial input
Falling of SCK: Serial output
M7’, S7’: Contents of previous master, slave MSB
Fig. 2.5.4 Serial I/O transfer timing
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-60