4524_M Datasheet, PDF (234/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.6 LCD function
➀ Stop Timer 5
Timer 5 operation is stopped.
Timer control register W5
b3
b0
✕ 0 ✕ ✕ b2: Timer 5 operation stop [TW5A]
➁ Stop Timer LC
Timer LC operation is stopped.
Timer LC count source is selected.
Timer control register W6
↓
b3
b0
0 0 ✕✕
[TW6A]
b3: Timer LC stop
b2: Bit 4 of timer 5 selected for timer LC count source
➂ Set SEG0–SEG2
SEG pins are selected.
Internal dividing resistor is set to be valid.
LCD control register L2
b3
00
↓
b0
00
[TL2A]
b3, b2, b1: SEG pins selected
b0: Internal dividing resistor valid
↓
➃ Set Timer LC
Timer LC value is set. (The formula is shown *A below.)
Timer LC reload register RLC “216”
Timer LC
Timer count value 2 set [TLCA]
➄ Initialize LCD Display RAM
LCD display RAM is initialized.
LCD display RAM
↓
Initial data is set.
➅ Set LCD Display Method
LCD duty and bias are set.
LCD control register L1
↓
b3
b0
1011
[TL1A]
b3: Internal dividing resistor r ✕ 3 selected
b1, b0: 1/4 duty, 1/3 bias set
➆ Start Timer 5 Operation
Timer 5 operation is started.
Timer control register W5
↓
b3
b0
✕ 1 ✕ ✕ b2: Timer 5 operation start [TW5A]
➇ Start Timer LC Operation
Timer LC operation is started.
Timer control register W6
↓
b3
b0
1 0 ✕ ✕ b3: Timer LC operation start [TW6A]
➈ Display LCD
LCD display function is set to be valid.
LCD control register L1
↓
b3
b0
1 1 1 1 b2: LCD turned ON [TL1A]
↓
Display changed by rewriting LCD display RAM
*A: The timer LC count value when the frequency is set to 85.3 Hz is set as follows.
1
1
1
1
85.3 Hz ≅ (32.768 kHz) ✕ ₁₆
✕
(2+1)
✕
2
✕
4
Sub-clock
Bit 4 of Timer LC
timer 5 count value
Duty
“✕”: it can be “0” or “1.”
“[ ]”: instruction
Fig. 2.6.6 Initial setting example
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-70