4524_M Datasheet, PDF (203/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.3 Timers
2.3.3 Timer application examples
(1) Timer operation: measurement of constant period
The constant period by the setting timer count value can be measured.
Outline: The constant period by the timer 1 underflow signal can be measured.
Specifications: Timer 1 and prescaler divide the system clock frequency f(XIN) = 4.0 MHz, and the
timer 1 interrupt request occurs every 3 ms.
Figure 2.3.4 shows the setting example of the constant period measurement.
(2) CNTR0 output operation: buzzer output
Outline: Square wave output from timer 2 can be used for buzzer output.
Specifications: 4 kHz square wave is output from the CNTR0 pin at system clock frequency f(XIN)
= 4.0 MHz. Also, timer 2 interrupt occurs simultaneously.
Figure 2.3.1 shows the peripheral circuit example, and Figure 2.3.5 shows the setting example of
CNTR0 output.
In order to reduce the current dissipation, output is high-impedance state during buzzer output stop.
4524
125 µs 125 µs
Set dividing ratio for timer 2 underflow cycle to 125 µs.
CNTR0
Fig. 2.3.1 Peripheral circuit example
(3) CNTR0 input operation: event count
Outline: Count operation can be performed by using the signal (rising waveform) input from CNTR0
pin as the event.
Specifications: The low-frequency pulse from external as the timer 1 count source is input to CNTR0
pin, and the timer 1 interrupt request occurs every 100 counts.
Figure 2.3.6 shows the setting example of CNTR0 input.
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-39