4524_M Datasheet, PDF (68/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
HARDWARE
FUNCTION BLOCK OPERATIONS
(5) How to use serial I/O
Figure 40 shows the serial I/O connection example. Serial I/O inter-
rupt is not used in this example. In the actual wiring, pull up the
wiring between each pin with a resistor. Figure 40 shows the data
transfer timing and Table 16 shows the data transfer sequence.
Master (clock control)
Slave (external clock)
D3
SCK
SOUT
SI N
(Bit 3)
00
(Bit 0)
11
Serial I/O control
register J1
Serial I/O port
SCK,SOUT,SIN
Instruction clock/8 selected
as synchronous clock
SRDY signal
D3
SCK
SIN
SOUT
(Bit 3)
11
(Bit 0)
11
Serial I/O control
register J1
Serial I/O port
SCK,SOUT,SIN
External clock selected
as synchronous clock
(Bit 3)
0✕
(Bit 0)
✕✕
Interrupt control
register V2
Serial I/O interrupt
enable bit
(SNZSI instruction valid)
(Bit 3)
0✕
(Bit 0)
✕✕
Interrupt control
register V2
Serial I/O interrupt
enable bit
(SNZSI instruction valid)
Fig. 40 Serial I/O connection example
✕: Set an arbitrary value.
Master
SOUT
SIN
SST instruction
M7’
S7’
M0
M1
M2
M3
M4
M5
M6
M7
S0
S1
S2
S3
S4
S5
S6 S7
SCK
Slave
SST instruction
SRDY signal
SOUT
SI N
S7’
M7’
S0
S1
S2
S3
S4
S5
S6
S7
M0
M1
M2
M3
M4
M5
M6 M7
M0–M7: Contents of master serial I/O register
S0–S7: Contents of slave serial I/O register
Rising of SCK: Serial input
Falling of SCK: Serial output
Fig. 41 Timing of serial I/O data transfer
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
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