4524_M Datasheet, PDF (176/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.1 I/O pins
(15) Key-on wakeup control register K2
Table 2.1.15 shows the key-on wakeup control register K2.
Set the contents of this register through register A with the TK2A instruction.
The contents of register K2 is transferred to register A with the TAK2 instruction.
Table 2.1.15 Key-on wakeup control register K2
Key-on wakeup control register K2
at reset : 00002 at power down : state retained
INT1 pin return condition
K23
selection bit
0 Return by level
1 Return by edge
INT1 pin key-on wakeup control
K22
bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
INT0 pin return condition
K21 _{selection bit}
0 Returned by level
1 Returned by edge
INT0 pin key-on wakeup control
K20
bit
0 Key-on wakeup invalid
1 Key-on wakeup valid
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: When setting the port, K22 and K23 are not used.
R/W
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-12