4524_M Datasheet, PDF (174/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.1 I/O pins
(11) Port output structure control register FR2
Table 2.1.11 shows the port output structure control register FR2.
Set the contents of this register through register A with the TFR2A instruction.
Table 2.1.11 Port output structure control register FR2
Port output structure control register FR2 at reset : 00002 at power down : state retained
W
Port D7/CNTR0
FR23
output structure selection bit
Port D6/SCK
FR22
output structure selection bit
Port D5/SOUT
FR21
output structure selection bit
Port D4/SIN
FR20
output structure selection bit
Note: “W” represents write enabled.
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
(12) Port output structure control register FR3
Table 2.1.12 shows the port output structure control register FR3.
Set the contents of this register through register A with the TFR3A instruction.
Table 2.1.12 Port output structure control register FR3
Port output structure control register FR3 at reset : 00002 at power down : state retained
W
Port P43
FR33
output structure selection bit
Port P42
FR32
output structure selection bit
Port P41
FR31
output structure selection bit
Port P40
FR30
output structure selection bit
Note: “W” represents write enabled.
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
0 N-channel open-drain output
1 CMOS output
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
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