4524_M Datasheet, PDF (168/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.1 I/O pins
(6) Port D
Ports D0–D7 are eight independent I/O ports, and ports D8 and D9 are two independent output ports.
Ports D4–D6 are also used as Serial I/O pins SIN, SOUT, SCK. Port D7 is also used as CNTR0 I/O
pin. Port D8 is also used as INT0 input pin. Port D9 is also used as INT1 input pin. Also, as for INT0
and INT1, its key-on wakeup function is switched to ON/OFF by the register K20 and K22.
s Input/output of port D
Each pin of port D has an independent 1-bit wide I/O function. For I/O of ports D0–D7 and output
of D8 and D9, select one of port D with the register Y of the data pointer first.
q Input
The pin state of port D can be obtained with the SZD instruction.
In the following conditions, if the pin state of port Dj (j=0, 1, 2, 3, 4, 5, 6 or 7) is “0” when the
SZD instruction is executed, the next instruction is skipped. If it is “1” when the SZD instruction
is executed, the next instruction is executed.
• Set bit i (i=0,1,2 or 3) of register FR1 or FR2 to “0” according to the port to be used.
• Set the output latch of specified port Dj to “1” with the SD instruction.
If FR1i or FR2i is “0” and the output latch is “0”, “0” is output to specified port D.
If FR1i or FR2i is “1”, the output latch value is output to specified port D.
q Output
Set the output level to the output latch with the SD, CLD and RD instructions.
The state of pin enters the high-impedance state when the SD instruction is executed.
All port D enter the high-impedance state or “H” level state when the CLD instruction is executed.
The state of pin becomes “L” level when the RD instruction is executed.
N-channel open-drain or CMOS can be selected as the output structure of ports D0–D7 in 1 bit unit
by setting registers FR1, FR2.
The output structure of ports D8 and D9 is N-channel open-drain.
Notes 1: When the SD and RD instructions are used, do not set “10102” or more to register Y.
2: Port D4 is also used as serial I/O pin SIN. Accordingly, when using port D4, set bit 1 (J11)
and bit 0 (J10) of register J1 to “002” or “012.”
3: Port D5 is also used as serial I/O pin SOUT. Accordingly, when using port D5, set bit J11
and bit J10 to “002” or “102.”
4: Port D6 is also used as serial I/O pin SCK. Accordingly, when using port D6, set bit J11 and
bit J10 to “002.” Also, set bit J13 and bit J12 to “002”, “012” or “102.”
5: Port D7 is also used as CNTR0 pin. Accordingly, when using port D7, set bit 0 (W60) of
register W6 to “0.”
(7) Port C
Port C is a 1-bit output port. Port C is also used as CNTR0 pin.
s Output
q Data output from port C
Set the output level to the output latch with the SCP and RCP instructions.
The state of pin becomes “H” level when the SCP instruction is executed.
The state of pin becomes “L” level when the RCP instruction is executed.
The output structure is CMOS.
Note: Port C is also used as CNTR1.
Accordingly, when using port C, set bit W31 and bit W30 to “002”, “012” or “102.” Also, set bit
W43 and bit W61 to “0.”
Rev.2.00 Aug, 06 2004
2-4
REJ09B0107-0200Z