English
Language : 

4524_M Datasheet, PDF (299/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES
4524 Group
APPENDIX
3.3 List of precautions
3.3.8 Notes on LCD function
(1) Timer LC count source
Stop timer LC counting to change timer LC count source.
(2) Writing to timer LC
Stop timer LC counting and then execute the data write instruction (TLCA).
(3) VLC3/SEG0 pin
When the VLC3 pin function is selected, apply voltage of VLC3 < VDD to the pin externally.
(4) VLC2/SEG1 pin, VLC1/SEG2 pin
• When the VLC2 pin and VLC1 pin functions are selected and the internal dividing resistor is not used;
Apply voltage of 0<VLC1<VLC2<VLC3 to these pins.
Short the VLC2 pin and VLC1 pin at 1/2 bias.
• When SEG1 and SEG2 pin function is selected;
Use the internal dividing resistor.
(5) LCD power circuit
Select the LCD power circuit suitable for LCD panel and evaluate the display state on the actual system.
3.3.9 Notes on reset
(1) Register initial value
The initial value of the following registers are undefined after system is released from reset. After
system is released from reset, set initial values.
• Register Z (2 bits)
• Register D (3 bits)
• Register E (8 bits)
(2) Power-on reset
Reset can be automatically performed at power on (power-on reset) by the built-in power-on reset
circuit. When the built-in power-on reset circuit is used, the time for the supply voltage to rise from
0 V to the minimum rating value of the recommended operating conditions must be set to 100 µs or
less. If the rising time exceeds 100 µs, connect a capacitor between the RESET pin and VSS at the
shortest distance, and input “L” level to RESET pin until the value of supply voltage reaches the
minimum rating value of the recommended operating conditions.
3.3.10 Note on voltage drop detection circuit
The voltage drop detection circuit detection voltage
of this product is set up lower than the minimum
value of the supply voltage of the recommended
operating conditions.
When the supply voltage of a microcomputer falls
below to the minimum value of recommended
operating conditions and re-goes up (ex. battery
exchange of an application product), depending on
the capacity value of the bypass capacitor added to
the power supply pin, the following case may cause
program failure (Figure 3.3.4);
• supply voltage does not fall below to VRST, and
• its voltage re-goes up with no reset.
In such a case, please design a system which supply
voltage is once reduced below to VRST and re-goes
up after that.
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
VDD
Recommended
operatng condition
min.value
VRST
No reset
Program failure may occur.
VDD
Recommended
operatng condition
min.value
VRST
Reset
Fig. 3.3.4 VDD and VRST
→ Normal operation
3-45