4524_M Datasheet, PDF (247/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.9 Power down
(5) Pull-up control register PU1
Table 2.9.8 shows the pull-up control register PU1.
Set the contents of this register through register A with the TPU1A instruction.
The contents of register PU1 is transferred to register A with the TAPU1 instruction.
Table 2.9.8 Pull-up control register PU1
Pull-up control register PU1
at reset : 00002 at power down : state retained
Port P13
PU13
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P12
PU12
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P11
PU11
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Port P10
PU10
pull-up transistor control bit
0 Pull-up transistor OFF
1 Pull-up transistor ON
Note: “R” represents read enabled, and “W” represents write enabled.
(6) Key-on wakeup control register K0
Table 2.9.9 shows the key-on wakeup control register K0.
Set the contents of this register through register A with the TK0A instruction.
The contents of register K0 is transferred to register A with the TAK0 instruction.
Table 2.9.9 Key-on wakeup control register K0
Key-on wakeup control register K0
at reset : 00002 at power down : state retained
Port P03
K03
key-on wakeup control bit
0 Key-on wakeup not used
1 Key-on wakeup used
Port P02
K02
key-on wakeup control bit
0 Key-on wakeup not used
1 Key-on wakeup used
Port P01
K01
key-on wakeup control bit
0 Key-on wakeup not used
1 Key-on wakeup used
Port P00
K00
key-on wakeup control bit
0 Key-on wakeup not used
1 Key-on wakeup used
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
R/W
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-83