4524_M Datasheet, PDF (114/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
HARDWARE
INSTRUCTIONS
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
POF (Power OFf1)
Instruction
code
D9
D0
Number of Number of Flag CY
0000000010
002
words
cycles
2
16
1
1
–
Skip condition
–
Operation: Transition to clock operating mode
Grouping: Other operation
Description: Puts the system in clock operating state by
executing the POF instruction after execut-
ing the EPOF instruction.
Note:
If the EPOF instruction is not executed before
executing this instruction, this instruction is
equivalent to the NOP instruction.
POF2 (Power OFf2)
Instruction
code
D9
D0
Number of Number of Flag CY
0000001000
008
words
cycles
2
16
1
1
–
Skip condition
–
Operation: Transition to RAM back-up mode
Grouping: Other operation
Description: Puts the system in RAM back-up state by
executing the POF2 instruction after ex-
ecuting the EPOF instruction.
Note:
If the EPOF instruction is not executed before
executing this instruction, this instruction is
equivalent to the NOP instruction.
RAR (Rotate Accumulator Right)
Instruction
code
D9
D0
Number of Number of Flag CY
0000011101
01D
words
cycles
2
16
1
1
0/1
Skip condition
–
Operation:
→ CY → A3A2A1A0
Grouping: Arithmetic operation
Description: Rotates 1 bit of the contents of register A in-
cluding the contents of carry flag CY to the
right.
RB j (Reset Bit)
Instruction
code
D9
D0
Number of Number of Flag CY
00010011j
j
0
2
4
C
+j ₁₆
words
1
cycles
1
–
Skip condition
–
Operation:
(Mj(DP)) ← 0
j = 0 to 3
Grouping: Bit operation
Description: Clears (0) the contents of bit j (bit specified
by the value j in the immediate field) of
M(DP).
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
1-101