4524_M Datasheet, PDF (209/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.3 Timers
➀ Disable Interrupts
Timer 3 interrupt and external interrupt are temporarily disabled.
Interrupt enable flag INTE 0
All interrupts disabled [DI]
Interrupt control register V1
b3
b0
✕ ✕ 0 ✕ b1: External 1 interrupt occurrence disabled [TV1A]
Interrupt control register V2
b3
b0
✕ ✕ ✕ 0 b0: Timer 3 interrupt occurrence disabled [TV2A]
↓
➁ Initialize Valid Waveform
INT1 pin is initialized.
Interrupt control register I2
b3
b0
0100
[TI2A]
b3: INT1 pin input disabled
b2: Rising waveform
b1: One-sided edge detected
b0: Timer 3 count start synchronous circuit not selected
↓
➂ Stop Timer 3 and Prescaler Operation
Timer 3 and prescaler are temporarily stopped.
Timer 3 count source is selected.
Timer control register W3
b3
00
Timer control register PA
b0
01
b0
0
[TW3A]
b3: Timer 3 count auto-stop circuit not selected
b2: Timer 3 stop
b1, b0: Prescaler output (ORCLK) selected for
Timer 3 count source
Prescaler stop [TPAA]
↓
➃ Set Port
INT1 pin is set to input.
Register Y
Port D9 output latch
b3
b0
1 0 0 1 Specify bit position of port D [TYA]
1
Set to input [SD]
↓
➄ Set Timer Value and Prescaler Value
Timer 3 and prescaler count times are set. (The formula is shown *A below.)
Timer 3 reload register R3 “5216”
Timer count value 82 set [T3AB]
Prescaler reload register RPS “0F16”
Prescaler count value 15 set [TPSAB]
↓
➅ Clear Interrupt Request
Timer 3 interrupt activated condition is cleared.
Timer 3 interrupt request flag T3F 0
Timer 3 interrupt activated condition cleared [SNZT3]
↓
( ) Note when the interrupt request is cleared
When ➅ is executed, considering the skip of the next instruction according to the interrupt request flag T3F,
insert the NOP instruction after the SNZT3 instruction.
↓
~ Set INT1 Input
INT1 pin input is set to be valid.
Interrupt control register I2
b3
b0 b3: INT1 pin input enabled [TI2A]
1 1 0 1 b0: Timer 3 count start synchronous circuit selected
↓
➇ Start Timer Operation and Prescaler Operation
Timer 3 and prescaler temporarily stopped are restarted.
Timer 3 count auto-stop circuit is selected. b3
b0
Timer control register W3 1 1 0 1
b0
Timer control register PA
1
[TW3A]
b3: Timer 3 count auto-stop circuit selected
b2: Timer 3 operation start
Prescaler start [TPAA]
↓
➈ Enable Interrupts
The Timer 3 interrupt which is temporarily disabled is enabled.
Interrupt control register V2
Interrupt enable flag INTE
b3
b0
✕ ✕ ✕ 1 b0: Timer 3 interrupt occurrence enabled [TV2A]
1
All interrupts enabled [EI]
↓
Ready for timer start by external input completed
*A: The prescaler count value and timer 3 count value to make the interrupt occur every 1 ms are set as follows.
1 ms ≅ (4.0 MHz)^-1 ✕ 3 ✕
System clock Instruction
clock
“✕”: it can be “0” or “1.”
“[ ]”: instruction
(15 +1) ✕
Presclaer
count value
(82 +1)
Timer 3 count value
Fig. 2.3.7 Timer start by external input setting example
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-45