4524_M Datasheet, PDF (232/310 Pages) Renesas Technology Corp – 4-BIT CISC SINGLE-CHIP MICROCOMPUTER 720 FAMILY / 4500 SERIES

4524 Group
APPLICATION
2.6 LCD function
(2) LCD control register L2
Table 2.6.3 shows the LCD control register L2.
Set the contents of this register through register A with the TL2A instruction.
Table 2.6.3 LCD control register L2
LCD control register L2
at reset : 11112 at power down : state retained
W
VLC3/SEG0 function switch bit
L23
(Note 2)
0 SEG0
1 VLC3
VLC2/SEG1 function switch bit
L22
(Note 3)
0 SEG1
1 VLC2
VLC1/SEG2 function switch bit
L21
(Note 3)
0 SEG2
1 VLC1
Internal dividing resistor for LCD 0 Internal dividing resistor valid
L20
power supply control bit
1 Internal dividing resistor invalid
Notes 1: “W” represents write enabled.
2: VLC3 is connected to VDD internally when SEG0 pin is selected.
3: Use internal dividing resistor when SEG1 and SEG2 pins are selected.
(3) Timer control register W6
Table 2.6.4 shows the timer control register W6.
Set the contents of this register through register A with the TW6A instruction.
In addition, the TAW6 instruction can be used to transfer the contents of register W6 to register A.
Table 2.6.4 Timer control register W6
Timer control register W6
at reset : 00002 at power down : state retained R/W
W63 Timer LC control bit
0 Stop (state retained)
1 Operating
Timer LC count source selection 0 Bit 4 (T54) of timer 5
W62
bit
1 Prescaler output (ORCLK)
CNTR1 output auto-control circuit 0 CNTR1 output auto-control circuit not selected
W61
selection bit
1 CNTR1 output auto-control circuit selected
D7/CNTR0 pin function selection 0 D7(I/O)/CNTR0 input
W60
bit (Note 2)
1 CNTR0 input/output/D7 (input)
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: CNTR0 input is valid only when CNTR0 input is selected for the timer 1 count source.
3: When setting the LCD, W61, W60 are not used.
Rev.2.00 Aug, 06 2004
REJ09B0107-0200Z
2-68