DS92UT16 Datasheet, PDF (97/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

OBSOLETE
DS92UT16
www.ti.com
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
Ball
P11
N11
M11
M10
J10
K9
L9
J12
L14
M14
L13
G10
J9
K11
L12
H10
M13
L10
N10
M9
L8
N9
M6
P4
N6
K7
K6
L5
K5
N5
M5
P3
N4
P2
M4
L4
N3
P1
M3
M2
N2
N1
M1
L3
K4
K3
P9
Table 95. Pin Locations—BGA196 Package (continued)
Pin Name
U_RxData [9]
U_RxData [10]
U_R xData [11]
U_RxData [12]
U_RxData [13]
U_RxData [14]
U_RxData [15]
U_RxENB [0]
U_RxENB [1]
U_RxENB [2]
U_RxENB [3]
U_RxENB [4]
U_RxENB [5]
U_RxENB [6]
U_RxENB [7]
U_RxParity
U_RxSOC
U_TxAddr[0]
U_TxAddr[1]
U_TxAddr[2]
U_TxAddr[3]
U_TxAddr[4]
U_TxCLAV [0]
U_TxCLAV [1]
U_TxCLAV [2]
U_TxCLAV [3]
U_TxCLAV [4]
U_TxCLAV [5]
U_TxCLAV [6]
U_TxCLAV [7]
U_TxData [0]
U_TxData [1]
U_TxData [2]
U_TxData [3]
U_TxData [4]
U_TxData [5]
U_TxData [6]
U_TxData [7]
U_TxData [8]
U_TxData [9]
U_TxData [10]
U_TxData [11]
U_TxData [12]
U_TxData [13]
U_TxData [14]
U_TxData [15]
U_TxENB [0]
Signal Type
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
Output LVTTL
Output LVTTL
Output LVTTL
Output LVTTL
Output LVTTL
Output LVTTL
Output LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
Bidir LVTTL
Input LVTTL
Input LVTTL
Input LVTTL
Input LVTTL
Input LVTTL
Input LVTTL
Input LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
BiDir LVTTL
Description
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Receive Data Bus, from the PHY Layer Device(s)
Enable Data Transfers—Normal/Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Enable Data Transfers—Extended PHY Port Control
Receive Data Bus Parity Bit
Receive Start of Cell
Address of MPHY Device Being Polled or Selected
Address of MPHY Device Being Polled or Selected
Address of MPHY Device Being Polled or Selected
Address of MPHY Device Being Polled or Selected
Address of MPHY Device Being Polled or Selected
Utopia Transmit Cell Available—Normal/Extended PHY Control
Utopia Transmit Cell Available—Normal/Extended PHY Control
Utopia Transmit Cell Available—Normal/Extended PHY Control
Utopia Transmit Cell Available—Normal/Extended PHY Control
Utopia Transmit Cell Available—Extended PHY Port Control
Utopia Transmit Cell Available—Extended PHY Port Control
Utopia Transmit Cell Available—Extended PHY Port Control
Utopia Transmit Cell Available—Extended PHY Port Control
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Transmit Data Bus, toward the PHY Layer Device(s)
Utopia Enable Data Transfers—Normal/Extended PHY Control
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