DS92UT16 Datasheet, PDF (103/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

OBSOLETE
DS92UT16
www.ti.com
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
LVDS SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.⁽¹⁾
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
Max Units
t_LLH
LVDS Low-to-High Transition R_L = 100, C_L = 10 pF
Time
(See Figure 25)
300
400
ps
t_LHL
LVDS High-to-Low Transition R_L = 100, C_L = 10 pF
Time
(See Figure 25)
t_RJIT
Random Jitter of LVDS Tx
Clock
LVDS_ADout[+,−],
LVDS_BDout[+.,−]
300
400
ps
60
150
ps
t_DJIT
Deterministic Jitter of LVDS
Tx Data
150
ps
t_DSR1
t_DRS2
Deserializer PLL Lock Time
from PWRDN (with
SYNCPAT)
Deserializer PLL Lock Time
from SYNCPAT
(See Figure 28)
(See Figure 29)
LVDS_ADin[+,−],
LVDS_BDin[+.,−]
30
µs
12
µs
t_RNM
Deserializer Noise Margin (See Figure 30)
400
ps
(1) Typical values are given for V_CC = 3.3V and T_A = 25°C
TIMING REQUIREMENTS FOR INPUT CLOCK
LVDS_TXCLK, LVDS_AREFCLK, LVDS_BREFCLK
Over recommended operating supply and temperature ranges unless otherwise specified.⁽¹⁾
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
Max Units
t_RFCP
t_RFDC
t_RFCP/t_TCP
t_RFTT
t_JIT
REFCLK Period
REFCLK Duty Cycle
Ratio of REFCLK to TCLK
REFCLK Transition Time
Input Jitter
(See Figure 27)
Jitter Frequency < 250 kHz
Jitter Frequency < 250 kHz
19.2
40
50
−5
ns
60
%
5
%
8
ns
15
UI
1.5
UI
Jitter Frequency < 250 kHz
0.15
UI
(1) Typical values are given for V_CC = 3.3V and T_A = 25°C
MICROPROCESSOR INTERFACE SWITCHING CHARACTERISTICS
Over recommended operating supply and temperature ranges unless otherwise specified.⁽¹⁾
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
Max Units
t_LLH
t_LHL
t_SETUP
t_HOLD
Low-to-High Transition Time
High-to-Low Transition Time
C_L = 15 pF (see Figure 26)
C_L = 15 pF (see Figure 26)
See Microprocessor Interface
Operation
Outputs
Inputs
6
ns
6
ns
(1) Typical values are given for V_CC = 3.3V and T_A = 25°C
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