DS92UT16 Datasheet, PDF (38/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16
OBSOLETE
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
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Table 14. General Alarms (continued)
Alarms
PDULA (UTOPIA AND ATM ALARMS—0xE1 UAA)
CTFRA (UTOPIA AND ATM ALARMS—0xE1 UAA)
UPRTY (UTOPIA AND ATM ALARMS—0xE1 UAA)
FIBOVA (UTOPIA AND ATM ALARMS—0xE1 UAA)
MTBSOVA (UTOPIA AND ATM ALARMS—0xE1 UAA)
MTBHOVA (UTOPIA AND ATM ALARMS—0xE1 UAA)
Description
PDU Length greater than 64 bytes.
Cell Transfer error on UTOPIA interface.
Parity error detected on UTOPIA interface.
FIB buffer overflow (down-bridge).
MTB Soft overflow. One or more of the 31 MTB queues has
exceeded its programmed threshold (up-bridge).
MTB Hard overflow. The MTB queue has overflowed (up-bridge).
Loopback Operation
To assist in diagnostic testing, the DS92UT16 provides both physical interface loopbacks and ATM cell
loopbacks as shown in Figure 7 in LOOPBACKS. The former is suitable for designer or commission testing when
the device is not passing live traffic. The latter allows cell trace testing on live traffic. All loopbacks are
programmable via the microprocessor interface. The LVDS physical loopbacks are described in LOOPBACK
TEST OPERATION.
ATM CELL LOOPBACK
The ATM Cell Loopback function provides two separate loopback operations. The Down2Up_ATM loopback
detects special loopback cells received on the UTOPIA interface and transmits them back out over the UTOPIA
interface. The Up2Down_ATM loopback detects special loopback cells received on the LVDS interface and
transmits them back out over the LVDS interface. Figure 7(b) in LOOPBACKS illustrates both of these
operations.
These loopback circuits accommodate one loopback cell at a time. Therefore, a loopback cell should be sent and
received before transmitting another loopback cell.
The ATM and LVDS Loopback Control register ALBC controls the ATM cell loopback functionality. See
GENERAL PURPOSE INPUT OUTPUT—0x15 GPIO. Bit D2ULB enables the Down2Up_ATM loopback and bit
U2DLB enables the Up2Down_ATM loopback. It is possible to enable both loopback operations at the same
time.
The special loopback cell format is defined in the ATM Loopback Cell Format registers ALBCF3–ALBCF0. See
ATM LOOPBACK CELL FORMAT —0x1C to 0x1F ALBCF3 to ALBCF0. These registers define the contents of
the cell’s four header bytes, which indicate that a received cell is a loopback cell. Associated with the
ALBCF3–ALBCF0 registers are the ATM Loopback Cell Filter registers ALFLT3–ALFLT0. See ATM LOOPBACK
CELL FILTER—0xF7 to 0xFA ALFLT3 to AFLT0. These registers define the cell header bits that are compared
with the header format declared in the ALBCF3–ALBCF0 registers. It is therefore possible to mask out any bits of
the cell header from comparison.
For Down2Up_ATM loopback on the UTOPIA interface only, a loopback cell will be sent back out to the MPhy
address on which it was received. So, if a loopback cell was detected coming into the device on MPhy address
0x01, then it will be sent back out of the device on the next occasion that a cell for MPhy address 0x01 is to be
sent.
For Up2Down_ATM loopback on the LVDS interface, the MPhy address is embedded in the incoming PDU.
Therefore, the loopback cell is simply transmitted back out.
For Down2Up_ATM loopback, only loopback cells as defined by the ALBCF3–ALBCF0 and ALFLT3–ALFLT0
registers are looped-back and all other cells are passed as normal.
For Up2Down_ATM loopback, only loopback cells as defined by the ALBCF3–ALBCF0 and ALFLT3–ALFLT0
registers are looped back and all other cells are passed as normal.
The Down2Up Loopback Cell Count register, the D2ULBCC in ATM DOWN2UP LOOPBACK CELL
COUNT—0xE0 D2ULBCC, maintains a count of the Down2UP_ATM loopback cells. Whenever this counter
increments, the D2ULBC alarm in the UAA register is set. See UTOPIA AND ATM ALARMS—0xE1 UAA. Note
that this counter only increments when the loopback cell exits the device. So the D2ULBC counter increments on
outgoing loopback cells.
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