DS92UT16 Datasheet, PDF (70/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16
OBSOLETE
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
RECEIVE PORT A REMOTE STATUS AND ALARMS—0x3C RARA
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Table 52. RARA
7
6
5
4
Reserved Reserved Reserved RARCS
Type: Bits[4:2] and [0] Read only/Clear on Read
Bit[1] Read only
3
2
RARLOSA RARLOSB
1
RARBA
0
RARDSLL
Software Lock: No
Reset Value: 0x0D
The Receive Port A Remote Status and Alarms register contains information on the status of the far-end device,
which is connected to Port A. On a local Loss of Signal on Port A, LLOSA alarm, these bits return to their reset
values. When set, the RARLOSA, RARLOSB, RARBA, and RARDSLL bits will raise an interrupt if the
corresponding interrupt enable is set. Also, a change in value on RARLOSA, RARLOSB, RARDSLL or RARBA
will set the RARCS bit. When set, the RARCS bit will raise an interrupt if the corresponding interrupt enable is
set.
• RARCS Receive Port A, Remote Change of Status at far end device LVDS receive Ports.
• RARLOSA Receive Port A, Remote Loss Of Signal at far end device LVDS receive Port A.
• RARLOSB Receive Port A, Remote Loss Of Signal at far end device LVDS receive Port B.
• RARBA Receive Port A, Remote far end device active receive Port. Set = Port B active and Clear = Port A
active. Note that this bit, if set, will not clear on a read of this register.
• RARDSLL Receive Port A, Remote far end device active receive port Descrambler Loss of Lock. Set = Out of
Lock and Clear = Lock.
RECEIVE PORT A REMOTE INTERRUPT ENABLES—0x3D RARIE
Table 53. RARIE
7
6
Reserved Reserved
Type: Read/Write
5
Reserved
4
3
2
RARCSIE RARLOSA RARLOSBI
IE
E
1
RARBAIE
0
RARDSLLI
E
Software Lock: No
Reset Value: 0x00
This register contains the interrupt enables for the alarms in the RARA register. Set = interrupt enabled and Clear
= interrupt disabled.
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