DS92UT16 Datasheet, PDF (23/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

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DS92UT16
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SNOS992E – JANUARY 2002 – REVISED APRIL 2013
Connected Port and Sub-Port Lists
Figure 11 illustrates the usage of the connected port list registers (UCPL3–UCPL0) and the connected sub-port
list register (UCSPL). In this case, the DS92UT16 in ATM mode defines Port 1 and Sub-port 7 as not connected.
The UCPL3–UCPL0 registers contain 31 bits corresponding to the 31 possible Ports addressed by the MPhy
address busses. If a bit location in the UCPL3–UCPL0 registers is set, then that Port is connected. The sub-ports
of the connected Port are defined by the UCSPL register. If a bit location in the UCSPL register is set, then that
sub-port is connected.
In Figure 11, the registers are set as follows: UCPL3 = UCPL2 = UCPL1 = 0xF, UCPL0 = 0xFD, and UCSPL =
0xEF.
With bit 1 of UCPL0 cleared, then Port 1 is not connected. This means that none of the eight sub-ports of Port 1
are connected. So Port 1 Sub-port 7, Port 1 Sub-port 6, Port 1 Sub-port 5, Port 1 Sub-port 4, Port 1 Sub-port 3,
Port 1 Sub-port 2, Port 1 Sub-port 1, and Port 1 Sub-port 0 are not connected. Port 1 will therefore, not be polled.
With bit 7 of UCSPL cleared, then sub-port 7 is not connected. This means that sub-port 7 for all possible 31
ports is not connected. So Port 31 Sub-port 7, Port 30 Sub-port 7, Port 29 Sub-port 7,......and Port 0 Sub-port 7
are not connected.
Therefore, clearing a bit in the UCPL3–UCPL0 registers will disconnect 8 possible PHY port locations and
clearing a bit in the UCSPL register will disconnect 31 possible PHY port locations.
Figure 11. Connected Port and Connected Sub-Port Usage
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