DS92UT16 Datasheet, PDF (20/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16
OBSOLETE
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
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UTOPIA EXTENDED LEVEL 2 MODE - 248 PORTS
In UTOPIA Extended Level 2 mode:
• 8-bit or 16-bit data buses are controlled by the BWIDTH bit of the UCFG register. In 8-bit mode, only
U_TxData[7:0] and U_RxData[7:0] are valid; parity is calculated and checked only over these bits of the data
buses. In 16-bit mode, the full U_TxData[15:0] and U_RxData[15:0] are valid; parity is calculated and checked
over all bits of the data buses.
• In ATM mode, the DS92UT16 can communicate with up to 248 PHY ports using the MPhy address busses
U_TxAddr[4:0] and U_RxAddr[4:0], and the control signals U_TxCLAV[7:0], U_RxCLAV[7:0], U_TxENB[7:0]
and U_RxENB[7:0]. In PHY mode, the DS92UT16 behaves as a standard Level 2 device and only 31 ports
are needed using the MPhy address busses U_TxAddr[4:0] and U_RxAddr[4:0], and the control signals
U_TxCLAV[0], U_RxCLAV[0], U_TxENB[0] and U_RxENB[0].
• All Queues from 30 to 0 of the MTB may be used. There is one queue for each MPhy address so the use of
the queues will depend on the connected ports list defined by the UCPL3–UCPL0 registers.
• The connected ports list defined by the UCPL3–UCPL0 registers and the connected sub-port list defined in
the UCSPL register are used. In ATM mode, these registers are used to determine which ports should be
polled. In PHY mode, these registers are used to determine which MPhy addresses the device should
respond to during polling.
• The sub-port address location defined by USPAL and USPAM registers is used in ATM mode to determine
the location of the 3-bit sub-port address in the PDU cell. In PHY mode these registers are not used.
• The CLAV mode bits CLVM[1:0] of the UCFG register should be defined as CLVM[1:0] = 11.
The configuration of the inputs/outputs of the UTOPIA Level 2 interface for ATM Layer mode and PHY Layer
mode is shown in Figure 9.
Figure 9. Extended UTOPIA Level 2 UMODE Configuration
The main difference is that in ATM mode the CLAV pins are inputs and the MPhy Address and ENB pins are
outputs, whereas in PHY mode the CLAV pins are outputs and the MPhy Address and ENB pins are inputs. Also,
in ATM mode all eight CLAV and ENB pins are used, but in PHY mode only one of the CLAV and ENB pins are
used.
Note that in ATM Layer mode the DS92UT16 does not generate the UTOPIA clocks but must be supplied with
these clocks just as in PHY mode.
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