DS92UT16 Datasheet, PDF (42/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16
OBSOLETE
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
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SUMMARY
• Tx - If the ETXBR bit is set, then write the message to the ETXD7–ETXD0 registers.
• Tx - Set the ETXSD bit to send the message. This clears ETXBR.
• Rx - When full message is received, the ERABF bit is set and this raises an interrupt.
• Rx - After reading the message, clear the ERABF bit to allow new message to be received.
• Tx - The clearing of the ERABF bit sets the ETXBR bit, which allows a new message to be assembled and
transmitted.
Flow Charts
The Flow Charts in Figure 16 and Figure 17 summarize the control of the ECC receive and transmit.
Figure 16. ECC Transmit Flow Chart
Figure 17. ECC Receive Flow Chart (Port A)
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