DS92UT16 Datasheet, PDF (19/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

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DS92UT16
www.ti.com
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
The configuration of the inputs/outputs of the UTOPIA Level 2 interface for ATM Layer mode and PHY Layer
mode is shown in Figure 8. The main difference is that in ATM mode the CLAV pins are inputs and the MPhy
Address and ENB pins are outputs; whereas in PHY mode, the CLAV pins are outputs and the MPhy Address
and ENB pins are inputs.
Note that in ATM Layer mode the DS92UT16 does not generate the UTOPIA clocks and must be supplied with
these clocks just as in PHY mode.
Figure 8. Basic UTOPIA Level 2 UMODE Configuration
ATM Polling
When configured as an ATM Layer device, the DS92UT16 polls the connected PHY ports using the MPhy
address busses U_TxAddr and U_RxAddr. Only those ports which are connected will be polled. The connected
ports list defined in the UCPL3–UCPL0 registers is used to determine which ports are connected. The PHY ports
respond only on U_TxCLAV[0] and U_RxCLAV[0]. On reset the UCPL3–UCPL0 registers are all set to 0xFF so
the DS92UT16 will poll all ports.
PHY Polling
When configured as a PHY Layer device the DS92UT16 is polled by the connected ATM device. During polling
the DS92UT16 will only respond to MPhy addresses, on U_TxAddr and U_RxAddr, which are defined as
connected. The connected ports list defined in the UCPL3–UCPL0 registers is used to determine which ports are
connected. On reset the UCPL3–UCPL0 registers are all set to 0xFF so the DS92UT16 will respond to all MPhy
addresses during polling. The DS92UT16 responds only on U_TxCLAV[0] and U_RxCLAV[0].
NOTE
There must always be at least one connected port defined in the UCPL3–UCPL0
registers. If no ports are to be connected then use Configuration Traffic Inhibit mode
described in Configuration and Traffic Inhibit Operation.
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