DS92UT16 Datasheet, PDF (80/111 Pages) Texas Instruments – DS92UT16TUF UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

DS92UT16
OBSOLETE
SNOS992E – JANUARY 2002 – REVISED APRIL 2013
RECEIVE PORT B UP2DOWN LOOPBACK CELL COUNT—0x7E RBU2DLBC
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Table 73. RBU2DLBC
7
6
RBU2DLB RBU2DLB
C[7]
C[6]
Type: Read only/Clear on Read
5
RBU2DLB
C[5]
4
RBU2DLB
C[4]
3
RBU2DLB
C[3]
2
RBU2DLB
C[2]
1
RBU2DLB
C[1]
0
RBU2DLB
C[0]
Software Lock: No
Reset Value: 0x00
The Receive Port B Up2Down Loopback Cell Count register counts the number of incoming loopback cells
detected from the Port B LVDS interface when Up2Down loopback is enabled with the U2DLB bit of the ALBC
register, see ATM AND LVDS LOOPBACK CONTROL—0x1A ALBC. Note that this counter is incremented when
an incoming loopback cell is received and that this differs from the functionality of the Down2Up Loopback Cell
Count register, see ATM DOWN2UP LOOPBACK CELL COUNT—0xE0 D2ULBCC.
• RBU2DLBC[7:0] Port B Up2Down Loopback Cell Count value. This register will not roll-over from 0x00 to
0xFF but will stick at 0xFF.
RECEIVE PORT B CELL DELINEATION THRESHOLDS—0x80 RBCDT
Table 74. RBCDT
7
ALPHA[3]
Type: Read/Write
6
ALPHA[2]
5
ALPHA[1]
4
ALPHA[0]
3
DELTA[3]
2
DELTA[2]
1
DELTA[1]
0
DELTA[0]
Software Lock: Yes
Reset Value: 0x78
The Receive Port B Cell and Transport Container Delineation Thresholds register controls the operation of the
Port B cell delineation state machine. The cell delineation lock status is refiected in the RBLTCLL bit of the RBLA
register.
• ALPHA[3:0] When in lock this is the number of consecutive incorrect cell HEC’s required to lose cell
delineation lock.
• DELTA[3:0] When out of lock this is the number of consecutive correct cell HEC’s required to gain cell
delineation lock.
RECEIVE PORT B FRAME DELINEATION THRESHOLDS—0x81 RBFDT
Table 75. RBFDT
7
MU[3]
Type: Read/Write
6
MU[2]
5
MU[1]
4
MU[0]
3
2
1
0
SIGMA[3] SIGMA[2] SIGMA[1] SIGMA[0]
Software Lock: Yes
Reset Value: 0x78
The Receive Port B Frame Delineation Thresholds register controls the operation of the Port B frame delineation
state machine. The frame delineation lock status is refiected in the RBLFLL bit of the RBLA register.
• MU[3:0] When in lock this is the number of consecutive incorrect cell HEC’s required to lose frame
delineation lock.
• SIGMA[3:0] When out of lock this is the number of consecutive correct frame HEC’s required to gain frame
delineation lock.
80
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