HD6413002 Datasheet, PDF (78/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

3.5 Pin Functions in Each Operating Mode
The pin functions of ports 4 and A vary depending on the operating mode. Table 3-3 indicates
their functions in each operating mode.
Table 3-3 Pin Functions in Each Mode
Port
Mode 1
Mode 2
Mode 3
Mode 4
Port 4
Port A
P4₇ to P4₀^*1
PA₇ to PA₄
D₇ to D₀^*1
PA₇ to PA₄
P4₇ to P4₀^*1
A₂₃ to A₂₀^*2
D₇ to D₀^*1
A₂₃ to A₂₀^*2
Notes: 1. Initial state. The bus mode can be switched by settings in ABWCR.
These pins function as P4₇ to P4₀ in 8-bit bus mode, and as D₇ to
D₀ in 16-bit bus mode.
2. A₂₀ is always an address output pin. A₂₃ to A₂₁ become valid when
0 is written in bits 7 to 5 of BRCR; initially, they function as PA₄ to
PA₆.
3.6 Memory Map in Each Operating Mode
Figure 3-1 shows a memory map for modes 1 to 4. The address space is divided into eight areas.
The initial bus mode differs between modes 1 and 2, and also between modes 3 and 4. The address
locations of the on-chip RAM and on-chip registers differ between the 1-Mbyte modes (modes 1
and 2) and 16-Mbyte modes (modes 3 and 4). The address range specifiable by the CPU in its
8- and 16-bit absolute addressing modes (@aa:8 and @aa:16) also differs.
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