HD6413002 Datasheet, PDF (373/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Timing of Setting of IMFA and IMFB by Input Capture: IMFA and IMFB are set to 1 by an
input capture signal. The TCNT contents are simultaneously transferred to the corresponding
general register. Figure 10-58 shows the timing.
ø
Input capture
signal
IMF
TCNT
N
GR
N
IMI
Figure 10-58 Timing of Setting of IMFA and IMFB by Input Capture
Timing of Setting of Overflow Flag (OVF): OVF is set to 1 when TCNT overflows from
H'FFFF to H'0000 or underflows from H'0000 to H'FFFF. Figure 10-59 shows the timing.
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