HD6413002 Datasheet, PDF (134/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Bus cycle
T₁
T₂
T₃
ø
Address bus
CS _n
AS
Odd external address in area n
RD
Read
access
D₁₅ to D₈
D₇ to D ₀
HWR
High
Invalid
Valid
Write
access
LWR
D₁₅ to D₈
Undetermined data
D₇ to D ₀
Valid
Note: n = 7 to 0 (but for CS_n, n = 3 to 0)
Figure 6-7 Bus Control Signal Timing for 16-Bit, Three-State-Access Area (2)
(Byte Access to Odd Address)
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