HD6413002 Datasheet, PDF (566/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

18.3.8 DMAC Timing
DMAC timing is shown as follows.
• DMAC TEND output timing for 2 state access
Figure 18-25 shows the DMAC TEND output timing for 2 state access.
• DMAC TEND output timing for 3 state access
Figure 18-26 shows the DMAC TEND output timing for 3 state access.
• DMAC DREQ input timing
Figure 18-27 shows DMAC DREQ input timing.
ø
TEND
T₁
t_TED1
T₂
t_TED2
Figure 18-25 DMAC TEND Output Timing/2 State Access
T₁
T₂
ø
t_TED1
TEND
T₃
t_TED2
Figure 18-26 DMAC TEND Output Timing/3 State Access
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