HD6413002 Datasheet, PDF (205/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Channel B
Bit 2 Bit 1 Bit 0
DTS2B DTS1B DTS0B Description
0
0
0
Compare match/input capture A interrupt from ITU (Initial value)
channel 0
1
Compare match/input capture A interrupt from ITU channel 1
1
0
Compare match/input capture A interrupt from ITU channel 2
1
Compare match/input capture A interrupt from ITU channel 3
1
0
0
Transmit-data-empty interrupt from SCI channel 0
1
Receive-data-full interrupt from SCI channel 0
1
0
Falling edge of DREQ input
1
Low level of DREQ input
The same internal interrupt can be selected as an activation source for two or more channels at
once. In that case the channels are activated in a priority order, highest-priority channel first. For
the priority order, see section 8.4.9, Multiple-Channel Operation.
When a channel is enabled (DTE = 1), its selected DMAC activation source cannot generate a
CPU interrupt.
191