HD6413002 Datasheet, PDF (508/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Table 14-4 A/D Conversion Time (Single Mode)
CKS = 0
Symbol Min
Typ
Synchronization delay
t_D
10
—
Input sampling time
t_SPL
—
80
A/D conversion time
t_CONV
259
—
Note: Values in the table are numbers of states.
Max
17
—
266
CKS = 1
Min
Typ
Max
6
—
9
—
40
—
131
—
134
14.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR, external
trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin sets the
ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as if the ADST bit had been set to 1 by software. Figure 14-6 shows the
timing.
ø
ADTRG
Internal trigger
signal
ADST
A/D conversion
Figure 14-6 External Trigger Input Timing
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