HD6413002 Datasheet, PDF (324/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Bit 1—Input Capture/Compare Match Flag B (IMFB): This status flag indicates GRB
compare match or input capture events.
Bit 1
IMFB
0
1
Description
[Clearing condition]
Read IMFB when IMFB = 1, then write 0 in IMFB
(Initial value)
[Setting conditions]
TCNT = GRB when GRB functions as an output compare register.
TCNT value is transferred to GRB by an input capture signal, when GRB functions as
an input capture register.
Bit 0—Input Capture/Compare Match Flag A (IMFA): This status flag indicates GRA
compare match or input capture events.
Bit 0
IMFA
0
1
Description
[Clearing condition]
Read IMFA when IMFA = 1, then write 0 in IMFA.
DMAC activated by IMIA interrupt (channels 0 to 3 only).
(Initial value)
[Setting conditions]
TCNT = GRA when GRA functions as an output compare register.
TCNT value is transferred to GRA by an input capture signal, when GRA functions
as an input capture register.
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