HD6413002 Datasheet, PDF (523/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Table 16–4 shows the external clock output stabilization delay time, and figure 16–7 shows the
timing for the external clock output stabilization delay time. The oscillator and duty correction
circuit have the function of regulating the waveform of the external clock input to the EXTAL pin.
When the specified clock signal is input to the EXTAL pin, internal clock signal output is
confirmed after the elapse of the external clock output stabilization delay time (t_DEXT). As clock
signal output is not confirmed during the t_DEXT period, the reset signal should be driven low and
the reset state maintained during this time.
Table 16–4 External Clock Output Stabilization Delay Time
Conditions: V_CC = 2.7 to 5.5 V, AV_CC = 2.7 to 5.5 V, V_SS = AV_SS = 0 V
Item
Symbol
Min
External clock output stabilization
t_DEXT*
500
delay time
Note: * t_DEXT includes a 10 t_cyc RES pulse width (t_RESW).
Max
—
Unit
µs
Notes
Figure 16-7
V_CC 2.7 V
STBY
V_IH
EXTAL
ø
RES
t_DEXT*
Note: * t_DEXT includes a 10 t_cyc RES pulse width (t_RESW).
Figure 16-7 External Clock Output Stabilization Delay Time
510