HD6413002 Datasheet, PDF (135/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Bus cycle
T₁
T₂
T₃
ø
Address bus
CS _n
External address in area n
AS
RD
Read
access
D₁₅ to D₈
D₇ to D ₀
HWR
Valid
Valid
Write
access
LWR
D₁₅ to D₈
Valid
D₇ to D ₀
Note: n = 7 to 0 (but for CS_n, n = 3 to 0)
Valid
Figure 6-8 Bus Control Signal Timing for 16-Bit, Three-State-Access Area (3)
(Word Access)
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